Fabless semiconductor startup optoML has raised $1.8 million in a pre-Series A funding round led by Bluehill.VC and A99. The transaction is expected to close pending regulatory approvals.
The proceeds will be used to scale hiring and initiate development of the company’s next generation of AI chips, following the successful completion of its 12nm tapeout with TSMC.
Founded by Saravana Maruthamuthu, optoML develops scalable Analog-in-Memory Compute (AiMC) architectures integrated with optical interconnects. The company targets AI workloads spanning edge devices, enterprise deployments, and hyperscale data centres. According to the startup, its patented in-memory compute design delivers up to 50x higher energy efficiency compared to traditional digital accelerators, addressing critical constraints around power consumption, latency, bandwidth, and silicon area.
As part of its execution roadmap, optoML has signed a memorandum of understanding with Kaynes Semicon to support assembly and testing once wafers arrive from TSMC. The partnership is aimed at accelerating the transition from silicon validation to scalable packaging, manufacturing, and product readiness.
Operating as a fabless semiconductor company, optoML focuses on AI System-on-Chip (SoC) platforms built on advanced FinFET nodes. The recent 12nm tapeout marks a key milestone in realizing its core AiMC architecture and advancing its SoC integration path.
Commenting on the investment, Manu Iyer, General Partner at Bluehill.VC, said the company sits at the intersection of two structural shifts in compute—analog in-memory architectures and optical interconnects—both critical as AI workloads scale from the edge to hyperscalers. Vignesh S, General Partner at A99, added that foundational semiconductor IP in AI infrastructure will be a defining theme over the next decade, particularly as power efficiency becomes a primary constraint in AI inference.
With fresh capital and strategic manufacturing partnerships in place, optoML is positioning itself to move from research-led innovation to commercial deployment, aiming to reshape the cost and efficiency curve of AI infrastructure through energy-efficient semiconductor design.
